ASIC Front End Implementation Engineer (San Francisco) Job at Sintegra Inc., San Francisco, CA

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  • Sintegra Inc.
  • San Francisco, CA

Job Description

Job Summary: As a Front-End Implementation Engineer, you will be responsible for ensuring the successful design and implementation of semiconductor circuits with a focus on CDC/RDC. You will work closely with cross-functional teams to optimize designs for performance, power, and area while maintaining high standards of quality and reliability.

Key Responsibilities:

  • Developed Design Constraints (SDC) for SOC for chip & block level.
  • Perform Logic Equivalence Checks to resolve the critical issues.
  • Collaborate with the synthesis and timing teams to achieve timing closure and optimize the design for power and performance.

Required Skills and Qualifications:

  • Bachelor's or Masters degree in Electrical Engineering, Computer Engineering, or a related field.
  • Hand-on experience in Lint, Clock Domain Crossing (CDC), Synthesis, LEC.
  • Minimum years of experience in front-end semiconductor design and implementation.
  • Proven experience with CDC/RDC verification and debugging.
  • Strong understanding of CDC/RDC methodologies and tools.
  • Experience with EDA tools for synthesis, STA, and formal verification (e.g., Synopsys, Cadence, Mentor Graphics).
  • Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation.

Seniority level

  • Seniority level

    Mid-Senior level

Employment type

  • Employment type

    Full-time

Job function

  • Industries

    Semiconductor Manufacturing

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Job Tags

Full time, 16 hours,

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